Data Sheet
ENERGY-TO-FREQUENCY CONVERSION
The ADE7953 provides two energy-to-frequency conversions for
calibration purposes. After initial calibration at manufacturing,
the manufacturer or end customer is often required to verify the
meter accuracy. One convenient way to do this is to provide an
output frequency that is proportional to the active, reactive, or
apparent power, or to the current rms under steady load condi-
tions. This output frequency provides a simple single-wire
interface that can be optically isolated to interface to external
calibration equipment. The ADE7953 includes two fully
programmable calibration frequency output pins: CF1 (Pin 23)
and CF2 (Pin 24). The energy-to-frequency conversion is
illustrated in Figure 57.
CFxSEL BITS
IN CFMODE REGISTER
ADE7953
The CF1 and CF2 pins can be configured to output a signal that
is proportional to the active power, reactive power, apparent
power, or IRMS on Current Channel A or Current Channel B.
In addition, it is possible to configure CF1 and CF2 to output a
signal that is proportional to the sum of the Current Channel A
IRMS and the Current Channel B IRMS, or, alternatively, propor-
tional to the sum of the active power on Current Channel A and
the active power on Current Channel B. Recalibration is required
in this configuration because the actual CF output equals the sum
of the active power on Current Channel A and the active power
on Current Channel B, divided by 2. The CF1 and CF2 output
pins are programmed by setting the CF1SEL and CF2SEL bits
in the CFMODE register (Address 0x107).
VA
IRMS
VAR
WATT
IRMSA + IRMSB
AWATT + BWATT
DFC
1
÷
CFxDEN
CFx PULSE
OUTPUT
Both pulse outputs (CF1 and CF2) are disabled by default
and can be enabled by clearing the CF1DIS and CF2DIS bits,
respectively, in the CFMODE register (Address 0x107).
PULSE OUTPUT CHARACTERISTICS
Figure 57. Energy-to-Frequency Conversion
Two digital-to-frequency converters (DFCs) are used to generate
the pulse outputs. The DFC generates a pulse each time ±1 LSB
is accumulated in the energy register. An output pulse is gener-
ated when CFxDEN number of pulses is generated at the DFC
output.
The pulse outputs for both DFCs stay low for 80 ms if the pulse
period is longer than 160 ms (6.25 Hz). If the pulse period is
shorter than 160 ms, the duty cycle of the pulse outputs is 50%.
The pulse outputs are active low. The maximum output frequency
with ac inputs at full scale and with CFxDEN = 0x00 is approxi-
mately 206.9 kHz.
The ADE7953 includes two unsigned 16-bit registers, CF1DEN
(Address 0x103) and CF2DEN (Address 0x104) that control the
CF output frequency on the CF1 and CF2 pins, respectively. The
16-bit frequency scaling registers can scale the output frequency
by 1/(2 16 – 1) to 1 with a step of 1/(2 16 – 1). Note that when
modifying the CF1DEN and CF2DEN registers, two sequential
write operations must be performed to ensure that the write is
successful.
Rev. B | Page 33 of 72
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